Q. _____ register Connected to the Processor bus is a single-way transfer capable.

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Q. In multiple Bus organisation, the registers are collectively placed and referred as ______ .

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Q. The main advantage of multiple bus organisation over single bus is

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Q. The ISA standard Buses are used to connect

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Q. Which of the following is not a form of memory ?

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Q. Which memory is difficult to interface with processor ?

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Q. Desirable characteristic(s) of a memory system is(are)

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Q. The minimum time delay required between initiation of two successive memory operations is called

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Q. For a memory system, the cycle time is

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Q. Generally , the refreshing rate of dynamic RAMs is approximately once in

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Q. In comparison with static RAM memory, the dynamic RAM memory has

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Q. Disadvantage of dynamic RAM over static RAM is

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Q. Memory consisting of electronic circuits attached into silicon chip is known as

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Q. Which of the following is the internal memory of the system (computer) ?

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Q. The idea of cache memory is based on

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Q. What is the correct sequence of time delays that happen during a data transfer from a disk to memory?

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Q. An 24 bit address generates an address space of ______ locations .

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Q. If a system is 64 bit machine , then the length of each word will be ____ .

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Q. The type of memory assignment used in Intel processors is _____ .

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Q. When using the Big Endian assignment to store a number, the sign bit of the number is stored in _____ .

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