Q. The _____ table contains the base address of each page in physical memory.

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Q. The size of a page is typically :

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Q. If the size of logical address space is 2 to the power of m, and a page size is 2 to the power of n addressing units, then the high order _____ bits of a logical address designate the page number, and the ____ low order bits designate the page offset.

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Q. With paging there is no ________ fragmentation.

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Q. The operating system maintains a ______ table that keeps track of how many frames have been allocated, how many are there, and how many are available.

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Q. Paging increases the ______ time.

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Q. Smaller page tables are implemented as a set of _______

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Q. The page table registers should be built with _______

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Q. For larger page tables, they are kept in main memory and a __________ points to the page table.

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Q. For every process there is a __________

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Q. Time taken in memory access through PTBR is :

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Q. Each entry in a Translation look-aside buffer (TLB) consists of :

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Q. If a page number is not found in the TLB, then it is known as a :

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Q. An ______ uniquely identifies processes and is used to provide address space protection for that process.

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Q. The percentage of times a page number is found in the TLB is known as :

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Q. Memory protection in a paged environment is accomplished by :

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Q. When the valid – invalid bit is set to valid, it means that the associated page :

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Q. Illegal addresses are trapped using the _____ bit.

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Q. When there is a large logical address space, the best way of paging would be :

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Q. In a paged memory, the page hit ratio is 0.35. The required to access a page in secondary memory is equal to 100 ns. The time required to access a page in primary memory is 10 ns. The average time required to access a page is :

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