Q. Dual independent bus architecture was first introduced in the ________________.

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Q. How many buses provided in Pentium II processor?

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Q. Pentium III processor was introduced in _______.

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Q. The processor 80386/80486 and the Pentium processor uses _____ bits address bus.

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Q. The Pentium microprocessor has______execution units.

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Q. The memory data bus width in Pentium is

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Q. If the logical processors want to execute complex IA-32 instructions simultaneously then the number of microcode instruction pointers required is

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Q. Which of the following is a type of branch prediction?

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Q. The prediction that is based on a statistical assumption that the majority of backward branches occur in repetitive loops is

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Q. The advantage of static prediction is

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Q. The dynamic branch prediction algorithms use

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Q. The unit that preserves the history of each conditional branch is

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Q. The BHT keeps a record that indicates the likelihood of the branches grouped as

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Q. Each logical processor has

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Q. If there is a trace cache miss, then the instruction bytes are required to be fetched from the

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Q. The Instruction Translation Lookaside Buffer(ITLB) is present in

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Q. Which of the following is not a type of context switching?

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Q. Which of the following is a resource sharing strategy that had been investigated by the developers?

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Q. The feature of hyperthreading is

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Q. Each logical processor maintains a set of architecture state which consists of

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