Q. Each logical processor has

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Q. If there is a trace cache miss, then the instruction bytes are required to be fetched from the

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Q. The Instruction Translation Lookaside Buffer(ITLB) is present in

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Q. Which of the following is not a type of context switching?

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Q. Which of the following is a resource sharing strategy that had been investigated by the developers?

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Q. The feature of hyperthreading is

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Q. Each logical processor maintains a set of architecture state which consists of

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Q. A logical processor may be temporarily stalled for

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Q. The hyperthreading technology automatically involves the

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Q. The instruction that is used when either of the logical processors is idle is

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Q. The mode that is available when there is only one software thread to execute is

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Q. The HALT instruction is a privileged instruction that can be only used by

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Q. When the operating system uses HALT instruction on a processor which supports multithreading, the operation moves from

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Q. The Xeon TM processor on which hyperthreading technology was first implemented consists of

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Q. The MMX instructions support only

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Q. For single precision floating point numbers, the SSE instructions are

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Q. The feature of SSE among the following is

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Q. The new instructions that are added in SSE for floating point operations are of

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Q. The SSE instructions can operate on

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Q. Which of the following group is not of SSE instructions?

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