adplus-dvertising
frame-decoration

Question

In a memory-mapped I/O system, which of the following will not be there?

a.

LDA

b.

IN

c.

ADD

d.

OUT

Posted under Computer Architecture

Answer: (a).LDA

Engage with the Community - Add Your Comment

Confused About the Answer? Ask for Details Here.

Know the Explanation? Add it Here.

Q. In a memory-mapped I/O system, which of the following will not be there?

Similar Questions

Discover Related MCQs

Q. Virtual memory consists of

Q. If the main memory is of 8K bytes and the cache memory is of 2K words. It uses associative mapping. Then each word of cache memory shall be

Q. Memory unit accessed by content is called

Q. The performance of cache memory is frequently measured in terms of a quantity called

Q. The cache memory of 1K words uses direct mapping with a block size of 4 words. How many blocks can the cache accommodate?

Q. A page fault

Q. If a block can be placed at every location in the cache, this cache is said to be

Q. For recording, was the block written, the Opteron keeps

Q. The information when is written in the cache, both to the block in the cache and the block present in the lower-level memory, refers to

Q. Average access time of memory for having memory-hierarchy performance is given as

Q. As segment or a page is normally used for block, page-fault and the address-fault is used for

Q. The block frame address are divided into the

Q. The increase in the width of the cache address tag, can be done with the

Q. The victim buffer's performance and the operation is almost similar to

Q. Assume that the hit-time is single clock cycle, independent of size of block, and then 16-byte block in a 4 KB cache will be having access-time of

Q. The virtual memory producing the virtual-addresses, are translated by

Q. The most obvious architectural parameter is the

Q. The time of CPU can be modeled as

Q. The processor protection structure expand memory access protection from two levels to many, the added ones are

Q. The virtually indexer's limitation, saying that a cache which is direct-mapped can have a size no bigger than the