Q. Divide overflow is generated when

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Q. Arithmetic shift left operation

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Q. The content of a 4-bit register is initially 1101. The register is shifted 2 times to the right with the serial input being 1011101.
What is the content of the register after each shift?

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Q. If a register containing data (11001100)2 is subjected to arithmetic shift left operation, then the content of the register after 'ashl' shall be

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Q. In addition of two signed numbers, represented in 2' s complement form generates an overflow if

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Q. Addition of (1111)2 to a 4 bit binary number 'a' results:-

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Q. Negative numbers cannot be represented in

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Q. In Boolean expression A+BC equals

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Q. Manipulation of individual bits of a word is often referred to as

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Q. BCD equivalent of Two's complement is

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Q. Gray code equivalent of (1000)2 is

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Q. In computers, subtraction is generally carried out by

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Q. (2FAOC)16 is equivalent to

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Q. In signed-magnitude binary division, if the dividend is (11100)2 and divisor is (10011)2, then the result is

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Q. In computers, subtraction is carried out generally by

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Q. The multiplicand register & multiplier register of a hardware circuit implementing booth's algorithm have (11101) & (1100). The result shall be

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Q. A floating point number that has a 0 in the MSB of mantissa is said to have

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Q. (-27)10 can be represented in a signed magnitude format and in a 1’s complement format as

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Q. The 2's compliment form (Use 6 bit word) of the number 1010 is

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Q. The gray code equivalent of ( 1011)2 is

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