Question
a.
TMOD
b.
SCON
c.
TCON
d.
SMOD
Posted under Computer Architecture
Engage with the Community - Add Your Comment
Confused About the Answer? Ask for Details Here.
Know the Explanation? Add it Here.
Q. TF1, TR1, TF0, TR0 bits are of which register?
Similar Questions
Discover Related MCQs
Q. Which devices are specifically being used for converting serial to parallel and from parallel to serial respectively?
View solution
Q. What is the difference between UART and USART communication?
View solution
Q. Which of the following best describes the use of framing in asynchronous means of communication?
View solution
Q. Which of the following signal control the flow of data?
View solution
Q. Which of the following is the logic level understood by the micro-controller/micro-processor?
View solution
Q. What is null modem connection?
View solution
Q. Which of the following best states the reason that why baud rate is mentioned in serial communication?
View solution
Q. With what frequency UART operates( where f denoted the crystal frequency )?
View solution
Q. What is the function of SCON register?
View solution
Q. What should be done if we want to double the baud rate?
View solution
Q. When any interrupt is enabled, then where does the pointer moves immediately after this interrupt has occurred?
View solution
Q. What are the contents of the IE register, when the interrupt of the memory location 0x00 is caused?
View solution
Q. After RETI instruction is executed then the pointer will move to which location in the program?
View solution
Q. Which pin of the external hardware is said to exhibit INT0 interrupt?
View solution
Q. Which bit of the IE register is used to enable TxD/RxD interrupt?
View solution
Q. Which of the following combination is the best to enable the external hardware interrupt 0 of the IE register (assuming initially all bits of the IE register are zero)?
View solution
Q. Why normally LJMP instructions are the topmost lines of the ISR?
View solution
Q. Which register is used to make the pulse a level or a edge triggered pulse?
View solution
Q. What is the disadvantage of a level triggered pulse?
View solution
Q. What is the correct order of priority that is set after a controller gets reset?
View solution
Suggested Topics
Are you eager to expand your knowledge beyond Computer Architecture? We've curated a selection of related categories that you might find intriguing.
Click on the categories below to discover a wealth of MCQs and enrich your understanding of Computer Science. Happy exploring!