Q. The DMA transfer is initiated by _____

View solution

Q. Consider a two-level cache hierarchy L1 and L2 caches. An application incurs 1.4 memory accesses per instruction on average. For this application, the miss rate of L1 cache 0.1, the L2 cache experience on average. 7 misses per 1000 instructions. The miss rate of L2 expressed correct to two decimal places is ______________.

View solution

Q. A cache memory unit with capacity of N words and block size of B words is to be designed. If it is designed as direct mapped cache, the length of the TAG field is 10 bits. If the cache unit is now designed as a 16-way set-associative cache, the length of the TAG field is ______ bits.

View solution

Q. How many address bits are required to represent a 32 K memory

View solution

Q. How many address bits are required to represent 4K memory

View solution

Q. Which of the following memories stores the most number of bits?

View solution

Q. In a virtual memory system, the addresses used by the programmer belongs to

View solution

Q. The method for updating the main memory as soon as a word is removed from the Cache is called

View solution

Q. How many different addresses are required by the memory that contain 16K words?

View solution

Q. What is the bit storage capacity of a ROM with a 512' 4-organization?

View solution

Q. How many 128 x 8 RAM chips are needed to provide a memory capacity of 2048 bytes?

View solution

Q. Which of the following technology can give high speed RAM?

View solution

Q. In 8085 microprocessor how many I/O devices can be interfaced in I/O mapped I/O technique?

View solution

Q. How many memory chips of (128 x 8) are needed to provide a memory capacity of 4096 x 16?

View solution

Q. An attempt to access a location not owned by a Program is called

View solution

Q. Cache memory works on the principle of

View solution

Q. Memory interleaving technique is used to address the memory modules in order to have

View solution

Q. In a multiprogramming system, which of the following is used

View solution

Q. Associative memory is some times called as

View solution

Q. A more efficient way to organise a Page Table is by means of an associative memory having

View solution