Q. How many Flip-Flops are required for mod–16 counter?

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Q. The digital logic family which has minimum power dissipation is

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Q. Data can be changed from special code to temporal code by using

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Q. A ring counter consisting of five Flip-Flops will have

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Q. The speed of conversion is maximum in

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Q. The gates required to build a half adder are

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Q. If the input to T-flipflop is 100 Hz signal, the final output of the three T-flipflops in cascade is

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Q. The device which changes from serial data to parallel data is

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Q. A device which converts BCD to Seven Segment is called

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Q. The access time of ROM using bipolar transistors is about

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Q. The A/D converter whose conversion time is independent of the number of bits is

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Q. A 4-bit synchronous counter uses flip-flops with propagation delay times of 15 ns each. The maximum possible time required for change of state will be

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Q. Words having 8-bits are to be stored into computer memory. The number of lines required for writing into memory are

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Q. In successive-approximation A/D converter, offset voltage equal to 1/2 LSB is added to the D/A converter’s output. This is done to

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Q. How many flip flops are required to construct a decade counter

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Q. Which TTL logic gate is used for wired ANDing

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Q. The MSI chip 7474 is

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Q. When the set of input data to an even parity generator is 0111, the output will be

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Q. How many flip-flops are required to construct mod 30 counter

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Q. The number of control lines for 16 to 1 multiplexer is

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